Operator-level performance work across CUDA C++, Triton, and CuTe DSL.
GPU Kernel Optimization for LLM Inference FP32 RMSNorm and GEMV/small-M GEMM in CUDA C++ and Triton on RTX 5050. Fused residual add, RMS reduction, and scaling from seven eager PyTorch launches to one at 256 × 4096; passed 80/80 backend-shape checks. Row tiling and split-K accelerated two M=16 Triton projections 15.3–16.3× versus earlier implementations using CUDA Graph medians.
Triton FlashAttention-2: Forward Attention Online softmax without the N × N score matrix, FP16 MHA/GQA at head dimensions 32/64/128, and causal/partial-tile masking. Validated 60/60 cases against PyTorch SDPA; measured 255 registers/thread and 8.3% occupancy at D=128 with Nsight profiling.
GPU Mode B200 QR Decomposition Agentic CUDA workflow, batched FP32 Householder QR, Modal/Popcorn runs, and 23.7% local geomean reduction
LayerNorm Kernel Triton, CuTe DSL
Vector Addition Triton, CUDA C++
GEMM CUDA C++, Triton, CuTe DSL